In 2006, when AMD bought ATI, the CPU maker came up with a plan to fuse CPUs with GPUs together in one powerful central processing unit. This project was dubbed Fusion for obvious reasons, but AMD didn’t care to disclose much info on it in the last 2 years.

Nobody knows if Fusion will actually be a Multi-chip module or if it will use AMD’s DCM architecture, there’s enough room for speculation in this case. However, AMD Taiwan leaked some interesting pieces of info on denominations and performance-related aspects.

It so appears that the first fused processing unit was codenamed Swift, which is is part of a Shrike platform. Swift promises “richer graphics and a better media experience with improved overall performance and longer battery life.” Sounds like this is going to be aimed at portable devices as well.The Taiwanese division also mentioned that AMD continues to pursue maximum performance per watt as “We want to achieve the highest performance with the lowest power consumption.”

If all goes according to plan, Swift and Shrike should be ready for volume sales in 2H 2009, but the guys over at Fudzilla say that Swift won’t actually be available up until 2010. More likely Q2 2010 rather than the 2H 2009 timeframe.

Are supercomputers going to figure out the meaning of life anytime soon? OK, that might be a little too much to ask, even from a supercomputer. How about Matrix-like environments? Now this idea seems more plausible when we think about IBM’s Roadrunner project.

Don Grice, the chief engineer on IBM's Roadrunner, told Computer World: "We will break the petascale barrier. The only unknown for me will be what day it is. Griece compares the breaking of the petaflop barrier to the first step on the Moon. Most of the current supercomputers measure performance in hundreds of teraflops, but there’s a tight race between IBM along with Hewlett-Packard, Sun Microsystems, Cray and Silicon Graphics in order to determine which one would be the first to bust through to the petascale.

Roadrunner is set to go online later this year at the U.S. Department of Energy's Los Alamos National Laboratory, and will be able to compute enormous data strings, aiding in the research for nuclear weapons systems, climate changes and human genetics. Roadrunner has its components scattered over 6,000 square feet, weighs 500,000 pounds total, and uses 57 miles of cable, requiring 3.9 megawatts of power per hour.

The Roadrunner sure looks like some devourer of energy. Build several of these and we’ll be inside the Matrix in no time. Or maybe they’ll just want to figure out the mind of God?

Released on the 22th of April, 2003, with the SledgeHammer(K8) core, the Opteron server processor line is Intel Xeon's direct competitor, and was also the first processor to implement the AMD64 instruction set architecture. A few years later, in September 2007, AMD announced the Opteron line moves up to the AMD K10 architecture, to feature a quad-core configuration, and now, they just revealed the first energy efficient quad-core Opterons.


Unfortunately, AMD won't break any performance barrier this time, and probably the new Opteron processors won't event offer the best performance-per-watt ratio, but they are an interesting upgrade option for those already using them in their servers.

According to Randy Allen, corporate vice president and general manager of AMD's server and workstation division, "Our new Quad-Core AMD Opteron HE processors were designed to help datacenter managers who see power consumption and virtualization as the keys to solving their overall performance equation."

The new chips for dual processor servers from AMD are the following quad-core Opteron models: 2344 HE (1.70GHz), 2346 HE (1.80GHz) and 2347 HE (1.90GHz), while those having multi-processor machines can get the quad-core 2346 HE (1.80GHz) or the 2347 HE (1.90GHz) chips. All these processors feature so-called ACP of 55W, a considerably lower value when compared to existing quad-core AMD Opteron processors, but it seems the TDP is not going to be that low. According to AMD's own estimations, microprocessors with 55W ACP may have up to 79W TDP.

"These new processors which feature AMD’s advanced power management and virtualization innovations offer a compelling platform for power-conscious datacenter managers who are changing the way they think about performance,” Mr. Allen concluded.

Don't worry, I didn't forget about pricing, so here you go - for 1000-unit quantities, the AMD Opteron 2347 HE, 2346 HE and 2344 HE cost $377, $255 and $209. If a dual processor computer is not enough, then you may have to spend even more, because the AMD Opteron processors 8347 HE and 8346 HE are priced at $873 and $698, respectively.

While AMD is shedding more light on the upcoming 6-core and 12-core CPUs, Intel silently discloses some more interesting facts regarding their soon-to-be-released Nehalem CPU.

According to Expreview the Nehalem architecture is capable of triple-channel DDR3 which will provide a 32GB/s memory bandwith. Although this sounds quite impressive compared to what AMD has, it really isn’t much of an improvement over Intel’s current X48, capable of 25.6GB/s in dual-channel.

It appears that the Nehalem tests were performed using only DDR3 1,333MHz modules, while the X48 can use DDR3 1,600MHz, so Nehalem could easily improve the bandwidth using 2GHz memory. But that won’t necessarily be the case, as Intel apparently decided to stop at DDR3 1,600MH with Nehalem, as well. I bet Intel will carefully take all these specs into consideration and up the support over 1,6 GHz by launch time.

Nehalem will also require a new chipset, the X58, which should handle up to four graphics cards in CrossFireX mode. Now, don’t expect to see 4 X 16 PCIe lanes and insane improvements, as sources are estimating only 32 lanes. The X58 chipset will feature the ICH10 which will connect to the X58 via Intel's DMI interface.

As an aside, Intel is also considering physics engine scaling, which might have something to do with Intel's purchase of Havok. Chances are that some sort of physics engine could be integrated into the Nehalem processor, and NVIDIA’s integrated PPU would therefore become redundant.

From what we’ve seen thus far, CPU makers aim at doubling the number of cores in a processor each year. We know AMD’s Istanbul six-core should arrive in 2009, and now we find out that in the first part of 2010 AMD plans to release a 12-core CPU.

The latest server CPU roadmaps from AMD point out that this one will have a total of 12MB L3 cache 4xHT3, also integrating the AMD-V and APML (Advanced Platform Management Link) as well as a probe filter. The platform that is set to support the 12-core CPUs is codenamed Maranello and it will natively support 4XHT3 along with DDR3 RAM modules.

Within the same timeframe, AMD will release an improved six-core codenamed Sao Paulo, which appears to be a buffed-up 45nm successor for the Istambul. Both 12-cores and six-cores Sao Paolo will use a different socket, the G34. According to Fudzilla, the 12-core CPU is a multichip module also known by its MCM abbreviation. As I have previously pointed out in one of my posts, AMD is going the Intel way, as the MCM will have two 6-cores on the same chip and it should look very much like Intel’s Kentsfiend and Yorkfield.

Of course, this appears as a pretty good piece of news for the AMD fans, but we shouldn’t be forgetting that Intel also plans some powerful 8-cores for the next year.